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June 2
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Wednesday, June 2 • 18:05 - 18:25
Exploring Static Code Generation and SIMD-Acceleration for Machine Learning on RISC-V - Rafael Stahl, Technical University of Munich

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The deployment of machine learning applications on microcontrollers known as TinyML enables new low-power applications and always-on devices. The RISC-V architecture is attractive for such microcontrollers, because it provides easy extensibility, a healthy ecosystem and no license costs. The major challenges with resource-constrained devices are run time and memory usage. Existing machine learning frameworks provide runtime libraries that dynamically load and execute a model, but this entails overheads. In this talk, two static code generators based on TensorFlow Lite for Microcontrollers and TVM are presented, that avoid these overheads by generating static code to execute the model. Additionally, machine learning kernel implementations based on a RISC-V version of CMSIS-NN are provided that make use of the RISC-V P- and V-Extensions to accelerate inner loops with SIMD-Operations. The contributions were evaluated on the TinyMLPerf benchmark with the ETISS simulator and show the benefits of static code generation and specialized kernel implementations.

Speakers
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Rafael Stahl

Doctoral Candidate, Technical University of Munich
Rafael Stahl is a doctoral candidate at the Technical University of Munich at the Chair of Electronic Design Automation in his fourth year. He received his Bachelor and Master in "Electrical Engineering and Information Technology" from TU Munich. He gathered work experience at the... Read More →



Wednesday June 2, 2021 18:05 - 18:25 CEST
  Session
  • Slides Included Yes